Refresh Setting Example For Multiple Cpu High Speed Transmission - Mitsubishi Electric Q12DCCPU-V User Manual

13
COMMUNICATIONS BETWEEN CPU MODULES
13.3.3
(1) Communication using the multiple CPU high speed transmission area
13
- 24 13.3 Data Communications Using CPU Shared Memory
13.3.3 Communication using the multiple CPU high speed transmission area and auto refresh
Communication using the multiple CPU high speed transmission
area and auto refresh
and auto refresh
The communication using the multiple CPU high speed transmission area in the CPU
shared memory and auto refresh can be executed when all of the following conditions
are satisfied.
1) A multiple CPU high speed main base unit (Q3 DB) is used.
2) A Universal model QCPU (except the Q00UCPU, Q01UCPU, and Q02UCPU)
or the Q12DCCPU-V is used as CPU No.1.
3) Two or more Universal model QCPU(s) (except the Q00UCPU, Q01UCPU,
and Q02UCPU), Motion CPU(s) (Q172DCPU or Q173DCPU), Q12DCCPU-
V(s) or the Q24DHCCPU-V/-LS are used.
Communication using the multiple CPU high speed transmission area and auto
refresh are not available with a CPU module other than those shown in the above 3),
even if it is mounted on a multiple CPU high speed main base unit.
If a CPU module other than those shown in 3) is mounted on a multiple CPU high
speed main base unit, set "0" in the relevant "Points" field of "CPU specific send
range" in "Multiple CPU high speed transmission area setting".
Enter 0 for a CPU
module other than
the modules shown
in condition 3).
Figure 13.16 Refresh setting example for multiple CPU high speed transmission
Q12DCCPU-V Q06CCPU-V Q06CCPU-V-B