Counter Operation Statuses - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 11 16-BIT RELOAD TIMER (WITH THE EVENT COUNT FUNCTION)

11.6 Counter Operation Statuses

A counter status is determined by the CNTE bit of the control register and the WAIT
signal of the internal signal. The following three statuses can be set:
• Stop status (STOP status) by CNTE = 0 and WAIT = 1
• Activation trigger wait status (WAIT status) by CNTE = 1 and WAIT = 1
• Operation status (RUN status) by CNTE = 1 and WAIT = 0
■ Counter Operation Statuses
Figure 11.6-1 shows the counter operation statuses.
Reset
CNTE= 0
WAIT CNTE=1,WAIT=1
Counter: Holds the value at stop.
Undefined immediately after the
reset until the contents are loaded.
192
Figure 11.6-1 Counter Status Transition
STOP CNTE=0,WAIT=1
Counter: Holds the value at stop.
Undefined immediately after the
reset.
CNTE= 1
TRG= 0
RELD UF
TRG= 1
LOAD CNTE=1,WAIT=0
The contents of the reload register
are loaded to the counter.
CNTE=
CNTE= 1
TRG= 1
RUN CNTE=1,WAIT=0
Counter: Operation
TRG= 1
RELD UF
Status transition by hardware
Status transition by register
access
0
End of load