Ep0 Control Register (Ep0C) - Fujitsu MB90335 Series Hardware Manual

16-bit microcontroller
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CHAPTER 11 USB FUNCTION
11.3 Registers of USB Function
11.3.2

EP0 Control Register (EP0C)

EP0 control register (EP0C) controls concerning end point 0.
■ EP0 Control Register (EP0C)
Figure 11.3-4 shows the bit configuration of the EP0 control register (EP0C).
Address
bit
7
0000D2
Reserved
H
0
-
Address
bit
15
0000D3
-
H
X
-
R/W : Readable/Writable
Note:
Ensure that you must set the EP0 control register (EP0C), except bit9 STAL, when both bit7 RST of
the UDC control register (UDCC) and bit15 BFINI of the EP0I/EP0O status register (EP0IS/EP0OS)
are "1" and must not rewrite it while the USB is operating.
The following describes the function of each bit in the EP0 control register (EP0C).
[bit15 to bit12] Undefined bits
Writing has no effect on the operation. Reading is undefined.
[bit11, bit10] Reserved bits
It is reserved bit. Please write "00
These bits always reads "00
[bit9] STAL:STALL EndPoint0 set bit
Setting the STAL bit can put EndPoint0 in STALL status (STALL response).
STAL
0
1
202
Figure 11.3-4 EP0 Control Register (EP0C)
6
5
4
1
0
0
R/W
R/W
R/W
14
13
12
-
-
-
X
X
X
-
-
-
".
B
" when read.
B
Release of state of STALL
Set of state of STALL (STALL response)
FUJITSU MICROELECTRONICS LIMITED
3
2
1
PKS0
0
0
0
R/W
R/W
R/W
11
10
9
Reserved
Reserved
STAL
0
0
0
-
-
R/W
Operating mode
MB90335 Series
0
EP0 control register
0
Initial value
R/W
Access
8
Reserved
0
Initial value
-
Access
CM44-10137-6E

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