Fujitsu MB90335 Series Hardware Manual page 422

MB90335 Series
■ Serial Output Data Register 0, 1 (SODR0, SODR1)
Figure 18.4-6 shows the bit configuration of serial output data register.
Figure 18.4-6 Serial Output Data Register 0, 1 (SODR0, SODR1)
Address
ch.0 : 000022
ch.1 : 000028
W : Write only
X : Undefined value
The serial output data register 0, 1 (SODR0, SODR1) is a data buffer register for transmitting serial data.
• When sending operation is allowed (SCR0, SCR1: TXE=1), and if the sending data is written to the
serial output data registers 0, 1 (SODR0, SODR1), the sending data is transferred to the sending shift
register to be converted into the serial data and is sent out from the serial data output pins (SOT0, SOT1
pins).
• When the data length is seven bits, the data in upper one bit (SODR0, SODR1:D7) is invalid.
• The sending data empty flag (SSR0, SSR1: TDRE) is cleared to "0" as soon as sending data is written
into the serial output data registers 0, 1 (SODR0, SODR1).
• The sending data empty flag (SSR0, SSR1: TDRE) is set to "1" as soon as transmission to the sending
shift register completes.
• If the sending data empty flag (SSR0, SSR1: TDRE) is set to "1", the next sending data can be written
in. When sending interrupts are enabled, a sending interrupt is generated. Write the subsequent sending
data in the state that the sending data empty flag (SSR0, SSR1: TDRE) is "1".
Note:
Serial output data registers are write-only, while serial input data registers are read-only. Both of the
registers are located in the same address, so the writing values and reading values are different.
Instructions, such as the INC/DEC instruction, which provide the read modify write (RMW) operation,
cannot be used.
CM44-10137-6E
bit7 bit6 bit5
H
D7 D6 D5
H
W
W W
FUJITSU MICROELECTRONICS LIMITED
bit1
bit4 bit3 bit2
D4 D3 D2 D1
W W W
W
CHAPTER 18 UART
18.4 Register of UART
bit0
Initial value
D0
XXXXXXXX
B
W
401