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MB90335 Series
2
19.2.1
I
C Bus Status Register 0 (IBSR0)
The configuration and functions of I
2
■ I
C Bus Status Register 0 (IBSR0)
Figure 19.2-2 shows the bit configuration of I
Figure 19.2-2 Bit Configuration of I
ch.0:000070
R: Read only
The function of each bit of the I
[bit7] BB: Bus Busy
It is a bit shown the state of the I
0
1
[bit6] RSC: Repeated Start Condition
It is a start condition detection repeatedly bit.
0
1
Is cleared either by writing "0" in INT bit, with no addressing on the slave connection, or by detecting the
start condition during the halted bus, or by detecting the stop condition.
[bit5] AL: Arbitration Lost
It is an arbitration lost detection bit.
0
1
It is cleared by writing "0" in INT bit.
CM44-10137-6E
2
C bus status register 0 (IBSR0) are described.
bit
7
6
5
4
H
BB RSC
AL LRB TRX AAS GCA FBT
R
R
R
R
2
C bus status registers 0 (IBSR0) is described as follows.
2
C bus.
Stop condition is detected.
Start condition is detected. (The bus is used.)
The start condition is not repeatedly detected.
The start condition was detected in the bus Occupied again.
The arbitration lost is not detected.
When arbitration lost has occurred on master transmission, or when other systems are
using the bus, "1" was written in MSS bit.
FUJITSU MICROELECTRONICS LIMITED
2
C bus status registers 0 (IBSR0).
2
C Bus Status Register 0(IBSR0)
IBSR0
3
2
1
0
2
I
C Bus status register 0
Initial value
R
R
R
R
2
CHAPTER 19 I
C INTERFACE
2
19.2 I
C Interface Register
00000000
B
435
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