Dma Transfer Function - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
11.4.6

DMA Transfer Function

It is possible to transfer data between transmission/receive buffer and internal RAM that
the USB Function communicates. You can select the following two modes in DMA
transfer: one is packet transfer mode where data is transferred based on the number of
pieces of transfer set on a per-packet basis and another is data number automatic
transfer mode where all data is transferred based on the number of pieces of data
specified once. Each DMA transfer mode is explained.
■ Packet Transfer Mode
• The packet transfer mode performs transfer by setting the number of pieces of transfer per packet in
DMA and clearing the interrupt cause when transfer has been completed. The transfer mode can access
any buffer in each endpoint.
• Timing by which the buffer is accessed in OUT direction and IN direction is shown as follows.
• OUT direction (host PC → device) forwarding
Host PC
OUT
Device
Device
Host PC
DMAE
DRQIE
DRQ
SIZE
DER(ENx)
In OUT- direction transfer, a USB device must perform processes in the follows steps:
1. It confirms the number of pieces of transfer data when the DRQ flag is set and the interrupt process is
entered.
2. It sets the number of pieces of transfer data in the data counter register DDCT of DMA, enables DMA
with the DER register, and start transfer.
3. Once transfer has been completed, it clears the corresponding DRQ flag in the EP1S to EP5S registers
and the corresponding interrupt factor flag in the DSR register of μDMAC and returns from the interrupt
process.
*: EP1 to EP5 consists of the double buffers, it can be cleared only when one buffer that is not being
accessed is empty and data is read from another buffer being accessed and cannot be cleared even
though "0" is written to it if one buffer that is not being accessed has data left to be read (Dotted line
status). It continuously enters the DRQ interrupt process.
CM44-10137-6E
Figure 11.4-15 OUT Packet Forwarding
OUT packet
DATA0
ACK
DRQ flag*
CPU clear
DMA receive buffer read
(DATA0)
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 11 USB FUNCTION
11.4 Operation Explanation of USB Function
OUT packet
DATA1
OUT
ACK
DMA receive buffer read
DRQ flag*
CPU clear
(DATA1)
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