Fujitsu MB90335 Series Hardware Manual page 161

CHAPTER 6 LOW-POWER CONSUMPTION MODE
6.2 Block Diagram of Low-power Consumption Control Circuit
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CPU intermittent operation selector
The CPU intermittent operation sector selects the number of the suspended clocks in the CPU intermittent
operation mode.
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Standby controller circuit
The standby controller circuit controls the CPU clock control circuit and the peripheral clock control
circuit, and then performs the transition to the low-power consumption mode or cancellation.
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CPU clock controller circuit
The CPU clock controller circuit controls the clock supplied to CPU.
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Peripheral clock controller circuit
The peripheral clock controller circuit controls the clock supplied to the peripheral functions.
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Pin high-impedance controller circuit
The pin high-impedance controller circuit makes the external pin to the high-impedance while the mode is
in the time-base timer mode and the stop mode. For the pin to which pull-up option is selected, you need to
cut the pull-up resistance during the stop mode.
●
Internal reset generator circuit
This circuit generates internal reset signals.
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Low-power consumption mode control register (LPMCR)
The low-power consumption mode control register (LPMCR) shifts to/cancels the standby mode or sets the
CPU intermittent operation function.
140 FUJITSU MICROELECTRONICS LIMITED
MB90335 Series
CM44-10137-6E