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MB90335 Series
17.3.2
Operation State of Serial I/O
The states of serial I/O operation includes the following 4 types of states; STOP, HALT,
R/W WAIT of SDR, and TRANSFER.
■ Operation State of Serial I/O
●
STOP State
On RESET or in the state of writing "1" in STOP bit of SMCS, the shift counter is initialized, resulting in
SIR=0.
Returning from the stop state is performed by setting STOP = 0 and STRT = 1 (both can be set at the same
time). Even though STRT=1 is provided when STOP=1, transfer operation is not executed, since STOP bit
is upper than STRT bit.
●
HALT State
When MODE bit is "0", termination of transfer provides SMCS with BUSY=0 and SIR=1, resulting in the
initialization of the counter to go into HALT state. To return from the HALT state, set STRT to "1", then
transfer operation restarts.
●
Serial data register R/W standby
When MODE bit of SMCS is "1", termination of serial transfer provides SMCS with BUSY=0 and SIR=1,
resulting in the serial data register to go into R/W WAIT state. If the interrupt enable register is enabled,
this block issues interrupt signals.
To return from the R/W WAIT state, when the serial data register is read or written, then BUSY is set to
"1", which allows to transfer operation to restart.
CM44-10137-6E
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 17 EXTENDED I/O SERIAL INTERFACE
17.3 Operation of Extended I/O Serial Interface
379
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