Fujitsu MB90335 Series Hardware Manual page 626

16-bit microcontroller
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Receive Interrupt Generation and Flag Set Timing
.......................................................... 406
Register List of DTP/External Interrupt
Return from Hardware Interrupt
Return from Software Interrupt
.................................................... 279
SOF Interrupt
Stack Operation at the Start of Interrupt Processing
.......................................................... 103
Stack Operation when Interrupt Processing Returns
.......................................................... 103
Start of Hardware Interrupt
Start of Software Interrupt
Transition to Standby Mode and Interrupt
Transmit Interrupt Generation and Flag Set Timing
.......................................................... 408
Type and Function of Interrupt
Type and Function of USB Interrupt
.................................................. 404
UART Interrupt
Interrupt Control Register
Configuration of Interrupt Control Register (ICR)
Interrupt Control Register Functions
Interrupt Control Register List
Interrupt Control Registers (ICR00 to ICR15)
Interrupt Factors, Interrupt Vectors, and Interrupt Control
........................................ 50, 534
Registers
Interrupt Disable Instruction
Interrupt Disable Instructions
Restrictions on Interrupt Disable Instructions and Prefix
............................................ 43
Instructions
Interrupt Factors
Interrupt Factors, Interrupt Vectors, and Interrupt Control
.............................................. 534
Registers
Interrupt Level Mask Register
Interrupt Level Mask Register (ILM)
Interrupt Vector
Interrupt Factors, Interrupt Vectors, and Interrupt Control
.............................................. 534
Registers
.................................................... 49
Interrupt Vector
Interruption
Interruption Function of Extended I/O Serial Interface
.......................................................... 383
Interruption of UART, EI
Notes on Use of Delay Interruption Generation Module
(Delay Interruption Request Latch)
Interval Timer
....................................... 170
Interval Timer Function
Operation of Interval Timer Function (Time-base Timer)
.......................................................... 177
IOA
I/O Register Address Pointer (IOA)
ISCS
Extended Intelligent I/O Service (EI
................................................... 77
(ISCS)
ISD
Configuration of Extended Intelligent I/O Service (EI
Descriptor (ISD)
................... 359
............................... 62
................................ 70
..................................... 62
...................................... 70
................. 154
................................ 46
................. 51, 535
........ 56
................... 53, 57
................................. 52
............. 54
.................................. 43
......................... 34
OS, and μDMAC
2
............. 405
............ 110
.......................... 76
2
OS) Status Register
2
OS)
...................................... 74
L
Latch
Notes on Use of Delay Interruption Generation Module
(Delay Interruption Request Latch)
Low-power Consumption
Block Diagram of Low-power Consumption Control Circuit
..........................................................139
Low-power Consumption Mode
Operation Status in Low-power Consumption Mode
..........................................................152
Low-power Consumption Mode Control Register
Access to Low-power Consumption Mode Control Register
..........................................................143
Low-power Consumption Mode Control Register (LPMCR)
..........................................................141
LPMCR
Low-power Consumption Mode Control Register (LPMCR)
..........................................................141
LQFP-64
Package Dimension (LQFP-64)
M
M1, M0
Set Bit of Bus Mode (M1, M0)
Machine Clock
...................................................131
Machine Clock
Main Clock Mode
Main Clock Mode, PLL Clock Mode
Master/Slave Mode
Master/Slave Mode Communication Function
Maximum Cycle
Count Clock and Maximum Cycle
MB90335 Series
Block Diagram of the MB90335 Series
Feature of MB90335 Series
MD
Setting of Mode Pins (MD2 to MD0)
μDMAC
Interrupt of Time-base Timer and EI
..........................................................176
μDMAC Function
.................................................86
μDMAC Register List
............................................87
μDMAC Use Procedure
........................................101
Measurement
Data of Measurement Result
Measurement Mode and Counter Operation
Operation Flow of Pulse Width Measurement
Memory Map
2
........................................469
E
PROM Memory Map
.....................................................524
Memory Map
System Configuration and E
..........................................................468
Memory Space
Multibyte Data Allocation in Memory Space
Overview of CPU Memory Space
.............110
..................................8
...............................160
.......................130
............424
...........................308
........................7
.......................................2
.......................159
2
OS, μDMAC
..................................310
...............311
............314
2
PROM Memory Map
...............27
.............................21
605

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