Chapter 3 Interrupt - Fujitsu MB90335 Series Hardware Manual

CHAPTER 3
INTERRUPT
This chapter describes the interruption, extended
2
intelligent I/O service (EI OS), and direct memory access
controller (μDMAC) of MB90335 Series.
3.1 Outline of Interrupt
3.2 Interrupt Cause and Interrupt Vector
3.3 Interrupt Control Register and Peripheral Function
3.4 Hardware Interrupt
3.5 Software Interrupt
2
3.6 Interrupts by Extended Intelligent I/O Service (EI OS)
3.7 Exception Processing Interrupt
3.8 Interruption by μDMAC
3.9 Exceptions
3.10 Stack Operation of Interrupt Processing
3.11 Program Example of Interrupt Processing
3.12 Delayed Interrupt Generation Module
CM44-10137-6E FUJITSU MICROELECTRONICS LIMITED 45