Configuration Of Address Match Detection Function - Fujitsu MB90335 Series Hardware Manual

CHAPTER 21 ADDRESS MATCH DETECTION FUNCTION

21.3 Configuration of Address Match Detection Function

21.3 Configuration of Address Match Detection Function
This section details the registers used by the address match detection function.
■ List of Registers and Initial Values of Address Match Detection Function
Figure 21.3-1 List of Registers and Initial Values of Address Match Detection Function
Program address detection control status
register (PACSR)
Program address detection register 0
(PADR0): High
Program address detection register 0
(PADR0): Middle
Program address detection register 0
(PADR0): Low
Program address detection register 1
(PADR1): High
Program address detection register 1
(PADR1): Middle
Program address detection register 1
(PADR1): Low
×
: Undefined
462
Address : 009E
H
Address : 1FF2
H
Address : 1FF1
H
Address : 1FF0
H
Address : 1FF5
H
Address : 1FF4
H
Address : 1FF3
H
FUJITSU MICROELECTRONICS LIMITED
bit 7 6 5
0 0 0 0
bit 7 6 5
× × × ×
bit 15 14 13 12
× × × ×
bit 7 6 5
× × × ×
bit 7 6 5
× × × ×
bit 15 14 13 12
× × × ×
bit 7 6 5
× × × ×
MB90335 Series
4 3 2 1 0
0 0 0 0
4 3 2 1 0
× × × ×
11 10 9 8
× × × ×
4 3 2 1 0
× × × ×
4 3 2 1 0
× × × ×
11 10 9 8
× × × ×
4 3 2 1 0
× × × ×
CM44-10137-6E