Table of Contents
Advertisement
MB90335 Series
12.5.10
Suspend Resume
USB HOST supports suspend and resume operations.
■ Suspend Operation
When writing "1" to the SUSP bit of the host state status register (HSTATE),
• USB bus high impedance state
• Stop of circuit block where clock is not necessary
USB HOST follows the steps above, and puts the USB circuit in suspend status. When the USB circuit is
put in suspend status, it sets the SUSP bit of the host state status register (HSTATE) to "1".
It is inhibited for USB HOST to set the USB circuit to suspend status or stop clock supplied to the circuit
when the USB bus is being reset or the SOFBUSY of HSTATE is "1" or data is being sent or received.
■ Resume Operation
Before it can start resume operation in suspend status, one of the following conditions must be true:
(1) Write "0" to the SUSP bit of the host state status register (HSTATE).
(2) The pins D+ and D- for HOST are detected to be k-state.
(3) The device is detected being cut.
(4) The device is detected being connected.
After the RWKIRQ bit of the host interrupt register (HIRQ) is set to "1", an issuance of the token is
allowed. The followings show the operation timing for each condition.
Figure 12.5-11 Resume Operation by Register (Full Speed Mode)
(1) Write "0" to the SUSP bit of the host state status register (HSTATE)
Pin D+ for HOST
Pin D- for HOST
RWKIRQ bit of HIRQ
(RWKIRE=1)
: Power output from USB HOST
: Drive by resistances of pull-up and pull-down
∗ : This value is not guaranteed.
CM44-10137-6E
To bit2 of HCNT
"0" Write
FUJITSU MICROELECTRONICS LIMITED
20μs ∗
CHAPTER 12 USB HOST
12.5 Operation of USB HOST
1.33μs ∗
1 bit time
283
Advertisement
Table of Contents
