Outline Of Clock - Fujitsu MB90335 Series Hardware Manual

16-bit microcontroller
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CHAPTER 5 CLOCK

5.1 Outline of Clock

5.1
Outline of Clock
The clock generation section controls operation of the internal clock which is the
operation clock for the CPU and peripheral functions. The following are four kinds of the
clock.
• Machine clock:
• Machine cycle:
• Oscillation clock: Clock provided via a high-speed oscillation pin.
• PLL clock:
■ Overview of Clock
The clock generation section, containing an oscillator circuit, can generate the oscillation clock by being
connected with an external oscillator. Clock generated externally can be input and used as the oscillation
clock. The generator, also containing a PLL clock frequency multiplication circuit, can generate three
frequency multiplication clocks of the oscillation clock. The clock generation section controls the
oscillation stabilization wait time, controls the PLL clock multiplication and controls the internal clock
operation by clock switching with the clock selector.
Oscillation clock (HCLK)
This clock is generated by connecting an oscillator or inputting an external clock to the high-speed
oscillation pins.
Main clock (MCLK)
It is an oscillation clock frequency divided by 2 and an input clock to the time-base timer and clock selector.
PLL clock (PCLK)
An oscillation clock which is obtained by frequency multiplication through the internal PLL clock
frequency multiplication circuit (PLL oscillator circuit). Three kinds of clocks can be selected.
Machine clock (φ)
Operation clock for CPU and peripheral functions. One cycle of this clock is used as machine cycle (1/φ).
A desired clock can be selected from among the main clock, that is, an oscillation clock frequency divided
by 2 and the three frequency multiplication clocks.
Notes:
As for the oscillation clock, 1 MHz to 7 MHz can oscillate. The maximum operating frequency is
24 MHz for the CPU and peripheral functions. When multiplier exceeding the maximum operating
frequency is specified, the device does not operate correctly. If the source oscillation at a
frequency of 6 MHz, only 4-time frequency multiplication can be specified.
To use the USB HOST or USB function, the PLL clock mode must have been set.
124
Internal clock.
1 cycle of machine clock.
Clock generated by internal PLL oscillation.
FUJITSU MICROELECTRONICS LIMITED
MB90335 Series
CM44-10137-6E

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