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MB90335 Series
Receive data
(Operation mode 0)
Receive data
(Operation mode 1)
Receive data
(Operation mode 2)
*
PE, ORE, FRE
RDEF
* : PE flag cannot be use in mode 1.
PE, FRE flag cannot be used in mode 2.
ST : Start bit
SP : Stop bit
A/D : Address of mode 1 (multiprocessor mode)/Data selection bit
●
Timing of receiving interrupt generation
When receiving interrupts are enabled (SSR0, SSR1: RIE=1), any of a receiving data full flag (SSR0,
SSR1: RDRF), a parity error flag (SSR0, SSR1: PE), an overrun error flag (SSR0, SSR1:ORE), and a
framing error flag (SSR0, SSR1: FRE) is set to "1", then a receiving interrupt request is generated.
CM44-10137-6E
Figure 18.5-1 Timing of Receiving Operation and Set of Flags
ST
D0
ST
D0
D0
FUJITSU MICROELECTRONICS LIMITED
D1
D1
D1
CHAPTER 18 UART
18.5 UART Interrupt
D6
D5
D7/P
SP
D6
D7
A/D
SP
D6
D4
D5
D7
Receive Interrupt generation
407
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