Configuration Of Time-Base Timer - Fujitsu MB90335 Series Hardware Manual

16-bit microcontroller
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CHAPTER 9 TIME-BASE TIMER

9.2 Configuration of Time-base Timer

9.2
Configuration of Time-base Timer
The time-base timer consists of the following four blocks.
• Time-base timer counter
• Counter clear circuit
• Interval timer selector
• Time-base timer control register (TBTC)
■ Block Diagram of Time-base Timer
Figure 9.2-1 shows the block diagram of the time-base timer.
Time-base timer counter
2 division
×
×
1
2
of HCLK
Power-on reset
Stop mode start
CKSCR : MCS = 1
Time-base timer control register(TBTC)
Time-base timer interrupt signal
Undefined
OF
Overflow
Oscillation clock
HCLK
Switch Machine clock to PLL clock from Main clock
*
172
Figure 9.2-1 Block Diagram of Time-base Timer
to PPG timer
×
×
8
2
3
2
2
2
Counter
clear
0 *
circuit
Reserved
FUJITSU MICROELECTRONICS LIMITED
×
×
×
×
×
9
10
11
12
2
2
2
2
OF
OF
Interval timer
selector
TBOF clear
TBIE TBOF TBR TBC1 TBC0
MB90335 Series
to Watchdog
×
×
×
×
15
16
17
13
14
2
2
2
2
2
OF
to Oscillation
stabilization wait
time selector
in Clock control
unit
TBOF
set
CM44-10137-6E
timer
×
18
2
OF

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