CHAPTER 3 INTERRUPT
3.6 Interrupts by Extended Intelligent I/O Service (EI
Further, correction may be required, depending on the condition for executing EI
3.6-3.
Table 3.6-3 Compensation Value for Data Transfer at EI
Buffer Address
pointer
B:
8:
Even: Word transfer at even address
Odd: Word transfer at odd address
●
At completion of counting by data counter (DCT) (for final data transfer)
Because a hardware interrupt is activated at the end of data transfer by EI
added. The EI
2
EI
OS processing time when count ends =
2
OS processing time in data transfer + (21 + 6 × Z) machine cycles
EI
The interrupt handling time depends on the address to which the stack pointer points. Table 3.6-4 shows the
compensation values (Z) of the interrupt handling time.
Table 3.6-4 Compensation Value of Interrupt Handling Time (Z)
82
I/O register address pointer
Internal Access
External access
Byte data transfer
External bus width 8-bit/word transfer
2
OS processing time at the end of counting is calculated by the following expression.
Address which stack pointer indicates
At the internal even number address
At the internal odd number address
FUJITSU MICROELECTRONICS LIMITED
2
OS)
2
OS Processing Time
Internal Access
B/Even
B/Even
0
Odd
+ 2
B/Even
+ 1
8/Odd
+ 4
↑
Interrupt handling time
MB90335 Series
2
OS, as shown in Table
External access
Odd
B/Even
8/Odd
+ 2
+ 1
+ 4
+ 3
+ 3
+ 2
+ 6
+ 5
2
OS, the interrupt handling time is
Compensation Value (Z)
0
+ 2
CM44-10137-6E
+ 4
+ 6
+ 5
+ 8