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MB90335 Series
[bit14] DRQIIE: Transmit data interrupt enable bits
It allows an interrupt due to the interrupt factor for the EP0I status register "DRQI" to be generated.
DRQIIE
0
1
[bit13 to bit11] Undefined bits
Writing has no effect on the operation. Reading is undefined.
[bit10] DRQI: Transmission data interrupt request bit
It indicates that IN packet has been successfully transferred from the EP0 host, data has been read from
the transmission buffer, and the next transmit data can be written into the buffer. The DRQI bit is a
interrupt factor and writing "1" is ignored. Please clear by writing "0". "1" is read at the read
modification write.
DRQI
0
1
Note:
After the data write of the transmission buffer is processed, the DRQI must be cleared. Also, when
the DRQI is not set, writing "0" is prohibited. When the DRQI is set to "1", writing data to the
transmission buffer is enabled. Furthermore, it indicates the data is set to the transmission buffer at
the time of clearing. Therefore, when IN packet request is performed with DRQI set "1", the NAK is
responded to the HOST automatically.
[bit9 to bit0] Undefined bits
Writing has no effect on the operation. Reading is undefined.
CM44-10137-6E
Interrupt disabled by DRQI factor
Interruption permission by DRQI factor
Writing transmit data enable state
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 11 USB FUNCTION
11.3 Registers of USB Function
Operating mode
Operating mode
Clearing interrupt cause
215
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