Block Diagram Of 8/16-Bit Ppg Timer - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
15.1.1

Block Diagram of 8/16-bit PPG Timer

Block diagram of ch.0/ch.2 and ch.1/ch.3 of 8/16-bit PPG timer is shown.
■ Block Diagram of 8/16-bit PPG Timer
Figure 15.1-1 shows the block diagram of ch.0/ch.2. Figure 15.1-2 shows the block diagram of ch.1/ch.3.
Peripheral clock
Peripheral clock
Peripheral clock
Peripheral clock
Peripheral clock
Count clock
selection
Time-base counter output:
divided by 512 of Main clock
L/H selection
CM44-10137-6E
Figure 15.1-1 Block Diagram of 8/16-bit PPG Timer (ch.0/ch.2)
16 division
8 division
4 division
2 division
PCNT (Down counter)
L/H selector
PRLL PRLBH
PRLH
FUJITSU MICROELECTRONICS LIMITED
PPG0/PPG2
Output enabled
PPG0/PPG2
Output latch
PEN0
PUF0
PPGC0/PPGC2
(Operation mode control)
CHAPTER 15 8/16-BIT PPG TIMER
15.1 Overview of 8/16-bit PPG Timer
PPG0/PPG2
S
R Q
ch.1/ch.3 bollow
PIE0
"L"data bus
"H"data bus
IRQ
341