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APPENDIX B Instructions
B.4 Indirect Addressing
●
Accumulator indirect branch addressing (@A)
The address of the branch destination is the content (16 bits) of the low-order bytes (AL) of the
accumulator. It indicates the branch destination in the bank address space. Address bits 16 to 23 are
specified by the program counter bank register (PCB). For the Jump Context (JCTX) instruction, however,
address bits 16 to 23 are specified by the data bank register (DTB). This addressing is used for
unconditional branch instructions.
Figure B.4-11 Example of Accumulator Indirect Branch Addressing (@A)
JMP @A (This instruction causes an unconditional branch by accumulator indirect
branch addressing.)
Before execution
After execution
●
Indirect specification branch addressing (@ear)
The address of the branch destination is the word data at the address indicated by ear.
Figure B.4-12 Example of Indirect Specification Branch Addressing (@ear)
JMP @@RW0 (This instruction causes an unconditional branch by register indirect
Before execution
After execution
552
PC 3 C 2 0
A 6 6 7 7
3 B 2 0
PC 3 B 2 0
A 6 6 7 7
3 B 2 0
addressing.)
PC 3 C 2 0
RW0 7 F 4 8
PC 3 B 2 0
RW0 7 F 4 8
FUJITSU MICROELECTRONICS LIMITED
PCB 4 F
4F3B20
4F3C20
PCB 4 F
PCB 4 F
DTB 2 1
217F48
H
217F49
H
4F3B20
H Next instruction
PCB 4 F
4F3C20
H
4F3C21
H
DTB 2 1
MB90335 Series
Memory space
Next instruction
H
6 1
JMP @A
H
Memory space
2 0
3 B
7 3
JMP @@RW0
0 8
CM44-10137-6E
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