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MB90335 Series
: Available. With EI
With a stop request.)
❍
: Available. (The interrupt request flag is cleared by the interrupt clear signal.)
Δ
: Available when not using the interrupt factor shared with ICR
: Not available
*1: The interrupt levels for the peripheral functions sharing the ICRs are identical.
*2: The priority is given when interrupts with the same level are generated simultaneously.
*3: ch.2 and ch.3 can use even when USB HOST is operated.
Notes:
• If use of EI
2
EI
OS is activated when either of interrupt causes is detected. Any interrupt which is due to a
non-activation cause is masked during activation of EI
either of the interrupt requests be masked while EI
• In a resource for which two interrupt causes exist in a same interrupt control register (ICR), the
interrupt flag is cleared by the EI
• If two interrupt causes were found at a single interrupt number, both the interrupt request flags in
the resource are cleared by the μDMAC interrupt clear signal. Thus, if the μDMAC function is
used for one of the two causes, the other interrupt function will not be available. Set the interrupt
request permission bit to "0" in the appropriate resource, and take measures by software polling
processing.
■ Type and Function of USB Interrupt
*: End Point1 and End Point 2 can use even when USB HOST is operated.
CM44-10137-6E
2
OS stop function. (The interrupt request flag is cleared by the interrupt clear signal.
2
OS is permitted when a same interrupt control register (ICR) has two interrupt causes,
2
OS interrupt clear signal.
USB interrupt factor
USB function 1
USB function 2
USB function 3
USB function 4
USB HOST 1
USB HOST 2
FUJITSU MICROELECTRONICS LIMITED
3.2 Interrupt Cause and Interrupt Vector
2
OS. It is therefore recommended that
2
OS is in use.
Details
End point0-IN End Point0-OUT
*
End Point1-End Point5
SUSP SOF BRST WKUP CONF
SPK
DIRQ CNNIRQ URIRQ RWKIRQ
SOFIRQ CMPIRQ
CHAPTER 3 INTERRUPT
51
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