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MB90335 Series
[bit 3] SOFBUSY:SOF timer operation
It indicates whether the SOF timer is operating in host mode. Sending SOF stops when "0" is done in
the writing. To update them, you must set the RST bit in the UDC control register (UDCC) to "0".
SOFBUSY
[bit 2] SUSP: Suspend
It is a bit used to set suspend status in host mode. Writing "1" to the bit enables suspend status. When
you write "0" to the bit that holds "1" or the USB bus changes to k-state status, the suspend status is
deselected, the RWKIRQ bit in the host interrupt register (HIRQ) is "1". When connection or
disconnection is detected if the SUSP bit is "1", you must write "0" to the bit. Then, when disconnection
or connection is detected and the SUSP bit is cleared, the RWKIRQ bit in the host interrupt register
(HIRQ) is set to "1" twice, and overwrite the RWKIRQ bit with "1" when it is set to "1". It is forbidden
to set the bit to "1" while the USB is operating (such as resetting the USB bus or sending/receiving
data).
In host mode, it is forbidden to stop the USB clock even in suspend status. To update it, you must set
the RST bit in the UDC control register (UDCC) to "0" and are prohibited to set it to "1" in function
mode. In addition, if it is "1" when you change the mode from host mode to function mode, you must
get out of suspend status by writing "0" into it before changing the mode.
Table 12.4-2 Suspend Setting
"1" Write
They are "0" writing at "1" state.
The others
[bit 1] TMODE: Transfer mode
The transfer mode at the host mode is shown. Write "1" for the write operation. It is not initialized with
the RST bit in the UDC control register (UDCC). Please use the CPU clock at 24 MHz.
CM44-10137-6E
0
SOF timer is stop.
1
SOF timer is working.
SUSP
TMODE
0
Low Speed
1
Full Speed
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 12 USB HOST
12.4 Register of USB HOST
Operation mode
Operation
Suspend
Resume
State maintenance
Operation mode
261
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