Port Direction Register (Ddr0 To Ddr2, Ddr4 To Ddr6) - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
8.2.2

Port Direction Register (DDR0 to DDR2, DDR4 to DDR6)

The configuration and functions of the port direction register are described.
■ Port Direction Register (DDR0 to DDR2, DDR4 to DDR6)
Figure 8.2-2 shows the list of the port direction register (DDR0 to DDR2, DDR4 to DDR6).
Figure 8.2-2 List of Port Direction Register (DDR0 to DDR2, DDR4 to DDR6)
DDR0
000010
Address :
DDR1
000011
Address :
DDR2
000012
Address :
DDR4
000014
Address :
DDR5
000015
Address :
DDR6
000016
Address :
●
When each pin functions as a port
When each pin functions as a port, controls the corresponding each pin as follows.
• 0: Input mode.
• 1: Output mode reset sets to "0".
Note:
When accessing the DDR0 to DDR2, DDR4 to DDR6 registers by using the instruction of the read
modify write system (instructions such as bit set) is made, the bit targeted by an instruction becomes
the defined value, while the content of the output register set with the other bit changes to the input
value to the pin. Therefore, be sure to write an expected value into PDR firstly, and then set DDR,
and finally change to the output when changing the input pin to the output pin is made.
CM44-10137-6E
7 6 5
bit
D07 D06 D05
H
bit 15 14 13
D17 D16 D15
H
bit 7 6 5
D27 D26 D25
H
bit 7 6 5
D47 D46 D45
H
bit 15 14 13
- - -
H
7 6 5
bit
D67 D66 D65
H
FUJITSU MICROELECTRONICS LIMITED
4 3 2 1
D04 D03 D02 D01
12 11 10 9
D14 D13 D12 D11
4 3 2 1
D24 D23 D22 D21
4 3 2 1
D44 D43 D42 D41
12 11 10 9
D54 D53 D52 D51
4 3 2 1
D64 D63 D62 D61
CHAPTER 8 I/O PORT
8.2 I/O Port Register
0
Initial value
Access
00000000
D00 R/W
B
8
R/W
D10 00000000
B
0
R/W
D20 00000000
B
0
00000000
D40 R/W
B
8
---00000
R/W
D50
B
0
R/W
D60 00000000
B
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