Differential Hstl Class Ii - Xilinx Virtex-5 FPGA User Manual

Chapter 6: SelectIO Resources
Table 6-17
Table 6-17: HSTL (1.5V) Class II DC Voltage Specifications
Notes:
1. V
2. Per EIA/JESD8-6, "The value of V
3. HSTL_II_T_DCI has a weaker driver than HSTL_II_DCI.

Differential HSTL Class II

Figure 6-45
differential HSTL Class II (1.5V) with unidirectional termination.
X-Ref Target - Figure 6-45
256
lists the HSTL (1.5V) Class II DC voltage specifications.
V
CCO
(2)
V
REF
V
TT
V
IH
V
IL
V
OH
V
OL
(1)
I at V (mA)
OH OH
(1) (3)
I at V (mA)
OL OL
and V for lower drive currents are sample tested.
OL OH
the use conditions specified by the user."
shows a sample circuit illustrating a valid termination technique for
External Termination
IOB
DIFF_HSTL_II
DIFF_HSTL_II
Figure 6-45: Differential HSTL (1.5V) Class II Unidirectional Termination
www.xilinx.com
Min
1.40
0.68
V
REF
V
CCO
–16
16
is to be selected by the user to provide optimum noise margin in
REF
V = 0.75V V
TT
50Ω
Z 0
V = 0.75V V
TT TT
50Ω
Z 0
Typ
1.50
0.75
× 0.5
– V
CCO
+ 0.1 –
– – V
– 0.4 –
– –
–
–
= 0.75V
TT
IOB
50Ω
DIFF_HSTL_II
+
–
= 0.75V
50Ω
ug190_6_40_030206
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Max
1.60
0.90
–
–
– 0.1
REF
–
0.4
–
–