Differential Sstl2 Class Ii (2.5V) - Xilinx Virtex-5 FPGA User Manual

Table 6-30
Table 6-30: SSTL2 DC Voltage Specifications Class II
Notes:
1. N must be greater than or equal to –0.04 and less than or equal to 0.04.
2. V
3. V
4. Because SSTL2_I_DCI uses a controlled-impedance driver, V

Differential SSTL2 Class II (2.5V)

Figure 6-72
differential SSTL2 Class II (2.5V) with unidirectional termination.
X-Ref Target - Figure 6-72
External Termination
DIFF_SSTL2_II
DIFF_SSTL2_II
Figure 6-72: Differential SSTL2 Class II Unidirectional Termination
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
lists the SSTL2 DC voltage specifications for Class II.
V
CCO
= 0.5 × V
V
REF CCO
(1)
V = V + N
TT REF
≥ V
V + 0.15
IH REF
≤ V
V – 0.15
IL REF
≥ V
V + 0.81
OH REF
≤ V
(4)
V – 0.81
OL REF
I at V (mA)
OH OH
I at V (mA)
OL OL
maximum is V +0.3.
IH CCO
minimum does not conform to the formula.
IL
shows a sample circuit illustrating a valid termination technique for
V = 1.25V
TT
IOB
50Ω
R S = 25Ω
V = 1.25V
TT
50Ω
R S = 25Ω
www.xilinx.com
Specific Guidelines for I/O Supported Standards
Min
2.3
1.13
1.09
1.28
(3)
–0.3
1.93
0.36
–16.2
16.2
and V
OH OL
V = 1.25V
TT
IOB
50Ω
Z 0
V = 1.25V
TT
50Ω
Z 0
Typ Max
2.5 2.7
1.25 1.38
1.25 1.42
(2)
1.40 V + 0.3
CCO
1.1 1.27
2.03 2.13
0.46 0.55
– –
– –
are different.
DIFF_SSTL2_II
+
–
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