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Xilinx VC709 Manual
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Xilinx VC709 Manual

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VC709 Built-In Self Test
Flash Application
April 2015
XTP232

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Summary of Contents for Xilinx VC709

  • Page 1 VC709 Built-In Self Test Flash Application April 2015 XTP232...

  • Page 2: Revision History

    NOTICE OF DISCLAIMER: The information disclosed to you hereunder (the “Information”) is provided “AS-IS” with no warranty of any kind, express or implied. Xilinx does not assume any liability arising from your use of the Information. You are responsible for obtaining any rights you may require for your use of this Information.
  • Page 3 Overview Xilinx VC709 Board Software Requirements VC709 Setup VC709 BIST (Built-In Self Test) Compile VC709 BIST Design Program VC709 with BIST Design References Note: This presentation applies to the VC709...
  • Page 4 – The Built-In System Test (BIST) application uses an IPI MicroBlaze system to verify board functionality. A UART based terminal program interface offers users a menu of tests to run. Block Design Source – VC709 BIST Design Files (2015.1 C) ZIP file – Available through http://www.xilinx.com/vc709 Note: Presentation applies to the VC709...
  • Page 5 – Peripherals: AXI EMC, AXI IIC, AXI GPIO, AXI UART 16550, XADC Wizard – Other IP: Constant, Concat, gte2_top • Vivado Design Suite Tcl Command Reference Guide (UG835) • Designing IP Subsystems Using IP Integrator (UG994) Note: Presentation applies to the VC709...
  • Page 6 Xilinx VC709 Board...
  • Page 7 Vivado Software Requirements Xilinx Vivado Design Suite 2015.1, Design Edition + SDK – Combined installer Note: Presentation applies to the VC709...
  • Page 8 VC709 Setup Connect a USB Type- A to Mini-B cable to the USB UART connector on the VC709 board – Connect this cable to your PC...
  • Page 9 VC709 Setup Connect a USB Type- A to Micro-B cable to the USB JTAG (Digilent) connector on the VC709 board – Connect this cable to your PC – Power on the VC709 board for UART Drivers Installation...
  • Page 10 VC709 Setup Install USB UART Drivers – Refer to UG1033 for details on installing the USB to UART Drivers Note: Presentation applies to the VC709...
  • Page 11 VC709 Setup Reboot your PC if necessary Right-click on My Computer and select Properties – Select the Hardware tab – Click on Device Manager Note: Presentation applies to the VC709...
  • Page 12 VC709 Setup Expand the Ports Hardware – Right-click on Silicon Labs CP210x USB to UART Bridge and select Properties Note: Presentation applies to the VC709...
  • Page 13 VC709 Setup Under Port Settings tab – Click Advanced – Set the COM Port to an open Com Port setting from COM1 to COM4 Note: Presentation applies to the VC709...
  • Page 14 VC709 BIST Setup Refer to UG1036 regarding Tera Term installation Board Power must be on before starting Tera Term Start the Terminal Program – Select your USB Com Port – Set the baud to 9600 Note: Presentation applies to the VC709...
  • Page 15 VC709 BIST Unzip the VC709 BIST Design Files (2015.1 C) ZIP file – Available through http://www.xilinx.com/vc709 Note: Presentation applies to the VC709...
  • Page 16 VC709 BIST Open a Vivado Tcl Shell: Start → All Programs → Xilinx Design Tools → Vivado 2015.1 → Vivado 2015.1 Tcl Shell Note: Presentation applies to the VC709...
  • Page 17 VC709 BIST Download the bitstream with Vivado In the Vivado Tcl Shell, type: cd C:/vc709_bist/ready_for_download source bist_download.tcl Note: Presentation applies to the VC709...
  • Page 18 VC709 BIST View initial BIST screen Note: Presentation applies to the VC709...
  • Page 19 VC709 BIST UART Test – Type “1” to start the UART Test – After each test, press any key to return to the main menu Note: Presentation applies to the VC709...
  • Page 20 VC709 BIST LED Test – Type 2 to begin LED Test View Walking 1’s pattern on GPIO LEDs – Sequence repeats twice Note: Presentation applies to the VC709...
  • Page 21 VC709 BIST IIC Test – Type 3 to begin IIC Test Note: Presentation applies to the VC709...
  • Page 22 VC709 BIST Flash Test – Type 4 to begin Flash test Note: Presentation applies to the VC709...
  • Page 23 VC709 BIST Timer Test – Type 5 to begin Timer Test Note: Presentation applies to the VC709...
  • Page 24 VC709 BIST GPIO Switch Test – Set 8-position GPIO DIP Switch (SW2) – Type 6 to begin GPIO Switch Test • Reads switch settings Note: Presentation applies to the VC709...
  • Page 25 VC709 BIST C0 External Memory Test – Type 7 to begin DDR3 C0 External Memory Test Note: MIG controller “C0” is connected to the Left SODIMM...
  • Page 26 VC709 BIST C0 External Memory Test – Type 8 to begin DDR3 C0 External Memory Test Note: MIG controller “C1” is connected to the Right SODIMM...
  • Page 27 VC709 BIST Internal Memory Test – Type 9 to begin BRAM Memory Test Note: Presentation applies to the VC709...
  • Page 28 VC709 BIST Button Test – Type A to begin Button Test Note: Presentation applies to the VC709...
  • Page 29 Compile VC709 BIST Design...
  • Page 30 Compile VC709 BIST Design Open Vivado Start → All Programs → Xilinx Design Tools → Vivado 2015.1 → Vivado Select Open Project Note: Presentation applies to the VC709...
  • Page 31 Compile VC709 BIST Design Open the VC709 Design: – <Design Name>\vc709_bist.xpr Note: Presentation applies to the VC709...
  • Page 32 Compile VC709 BIST Design The design is fully implemented; you can recompile, or export to SDK – To recompile, right-click synth_1, select Reset Runs then Generate Bitstream Note: Presentation applies to the VC709...
  • Page 33 Compile VC709 BIST Design Once done, both the Synthesis and Implementation will have green check marks Note: Presentation applies to the VC709...
  • Page 34 Compile VC709 BIST Design The BIST Design has been implemented with IP Integrator (IPI) Click Open Block Design Note: Presentation applies to the VC709...
  • Page 35 Compile VC709 BIST Design All the IP Blocks used in the design can be seen in this view Click Open Implemented Design Note: Presentation applies to the VC709...
  • Page 36 Compile VC709 BIST Design View Implemented Design Note: Presentation applies to the VC709...
  • Page 37 Compile VC709 BIST Design Select File → Export → Export Hardware Click OK Note: Presentation applies to the VC709...
  • Page 38 Compile VC709 BIST Design Select File → Launch SDK Click OK Note: Presentation applies to the VC709...
  • Page 39 Compile VC709 Software in SDK SDK Software Compile - Build ELF files in SDK – When done, close SDK and return to Vivado Note: Presentation applies to the VC709...
  • Page 40 Program VC709 with BIST Design...
  • Page 41 Program VC709 with BIST Design Select Add Sources Note: Presentation applies to the VC709...
  • Page 42 Program VC709 with BIST Design Select Add or Create Design Sources Note: Presentation applies to the VC709...
  • Page 43 Program VC709 with BIST Design Add bist_app.elf from the SDK tree Make sure Copy sources into project is deselected Click Finish Note: Presentation applies to the VC709...
  • Page 44 Program VC709 with BIST Design Right-click on the ELF file and select Associate ELF files Note: Presentation applies to the VC709...
  • Page 45 Program VC709 with BIST Design Click the button to the right; select the bist_app.elf then click OK twice Note: Presentation applies to the VC709...
  • Page 46 Program VC709 with BIST Design Select Generate Bitstream – This creates a bitstream with the BIST ELF file Note: Presentation applies to the VC709...
  • Page 47 Program VC709 with BIST Design Click Open Hardware Manager Note: Presentation applies to the VC709...
  • Page 48 Program VC709 with BIST Design Click Open target and select Auto Connect Note: Presentation applies to the VC709...
  • Page 49 Program VC709 with BIST Design Select Program device → xc7vx690t_0 Note: Presentation applies to the VC709...
  • Page 50 Program VC709 with BIST Design The newly created bitstream is default Click Program Note: Presentation applies to the VC709...
  • Page 51 Program VC709 with BIST Design BIST Application runs in the terminal window Note: Presentation applies to the VC709...
  • Page 52 Program VC709 with BIST Design Close the Project Note: Presentation applies to the VC709...
  • Page 53 Repeat this process using Tcl scripts Open a Vivado Tcl Shell and type: cd C:/vc709_bist/ready_for_download source make_download_files.tcl This script uses Tcl commands to add the ELF file to the BIST project , then generate the BIST bitstream Note: Presentation applies to the VC709...
  • Page 54 Program VC709 with BIST Design Download the BIST bitstream In the Vivado Tcl Shell type: source bist_download.tcl Note: Presentation applies to the VC709...
  • Page 55 Program VC709 with BIST Design BIST Application runs in the terminal window Note: Presentation applies to the VC709...
  • Page 56 References...
  • Page 57 References IP Integrator Documentation – Vivado Design Suite Tcl Command Reference Guide – UG835 • http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_1/ ug835-vivado-tcl-commands.pdf – Designing IP Subsystems Using IP Integrator – UG994 • http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_1/ ug994-vivado-ip-subsystems.pdf 7 Series Configuration – 7 Series FPGAs Configuration User Guide – UG470 •...
  • Page 58 Documentation...
  • Page 59 – Design Advisory Master Answer Record for Virtex-7 FPGAs • http://www.xilinx.com/support/answers/42944.htm VC709 Documentation – Virtex-7 FPGA VC709 Evaluation Kit • http://www.xilinx.com/products/boards-and-kits/dk-v7-vc709-g.html – VC709 Getting Started Guide – UG966 • http://www.xilinx.com/support/documentation/boards_and_kits/vc709/2014_3/ ug966-v7-xt-connectivity-getting-started.pdf – VC709 User Guide – UG887 • http://www.xilinx.com/support/documentation/boards_and_kits/ vc709/ug887-vc709-eval-board-v7-fpga.pdf...