Application Examples; Standard Usage; Board-Level Clock Generation - Xilinx Virtex-5 FPGA User Manual

Application Examples

The Virtex-5 FPGA DCM can be used in a variety of creative and useful applications. The
following examples show some of the more common applications.

Standard Usage

The circuit in
access to RST and LOCKED pins. This example shows the simplest use case for a DCM.
X-Ref Target - Figure 2-8

Board-Level Clock Generation

The board-level clock generation example in
generate output clocks for other components on the board. This clock can then be used to
interface with other devices. In this example, a DDR register is used with its inputs
connected to GND and V
stays within global routing until it reaches the output register. The quality of the clock is
maintained.
The board-level clock generation example in
the clock generation for a forwarded clock on the board.
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
Figure 2-8 shows DCM_BASE implemented with internal feedback and
IBUFG
CLKIN
CLKFB
IBUF
RST
Figure 2-8: Standard Usage
. Because the output of the DCM is routed to BUFG, the clock
CC
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Application Examples
DCM_BASE
CLK0
CLK90
CLK180
CLK270
CLK2X
CLK2X180
CLKDV
CLKFX
CLKFX180
LOCKED
ug190_2_08_032506
Figure 2-9 illustrates how to use a DCM to
Figure 2-10, with internal feedback, illustrates
BUFG
OBUF
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