Pci-X, Pci-33, Pci-66 (Peripheral Component Interconnect) - Xilinx Virtex-5 FPGA User Manual

PCI-X, PCI-33, PCI-66 (Peripheral Component Interconnect)

The PCI™ standard specifies support for 33 MHz and 66 MHz bus applications. The
PCI-X™ standard specifies support for 66 MHz and 133 MHz bus applications. These
standards use an LVTTL input buffer and a push-pull output buffer. These standards do
not require the use of a reference voltage (V
However, they do require 3.3V input/output source voltage (V
A PCI undershoot/overshoot specification could require V
discussed in
undershoot are controlled by careful design.
Table 6-11
Table 6-11: PCI33_3, PCI66_3 Voltage Specifications
Notes:
1. Tested according to the relevant specification.
2. For complete specifications, refer to the PCI specification.
Table 6-12: PCI-X DC Voltage Specifications
Notes:
1. Tested according to the relevant specification.
2. For complete specifications, refer to the PCI-X specification.
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
"Regulating V
and Table 6-12 lists the DC voltage specifications.
Parameter
V
CCO
V
REF
V
TT
V = 0.5 × V
IH CCO
V = 0.3 × V
IL CCO
V = 0.9 × V
OH CCO
V = 0.1 × V
OL CCO
I at V (mA)
OH OH
I at V (mA)
OL OL
Parameter
V
CCO
V
REF
V
TT
V = 0.5 × V
IH CCO
V = 0.35 × V
IL CCO
V = 0.9 × V
OH CCO
V = 0.1 × V
OL CCO
I at V (mA)
OH OH
I at V (mA)
OL OL
www.xilinx.com
Specific Guidelines for I/O Supported Standards
) or a board termination voltage (V
REF
at 3.0V," page 304. This is not necessary if overshoot and
CCO
Min
3.0
–
–
1.5
–0.2
2.7
–
(Note 1)
(Note 1)
(2)
Min
3.0
–
–
1.5
–0.2
2.7
–
(Note 1)
(Note 1)
TT
).
CCO
to be regulated at 3.0V as
CCO
(2)
Typ Max
3.3 3.5
– –
– –
1.65 V
CCO
0.99 1.05
– –
– 0.35
– –
– –
Typ Max
3.3 3.5
– –
– –
1.65 V
CCO
1.155 1.225
– –
– 0.35
– –
– –
).
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