Sstl18 Class Ii (1.8V) - Xilinx Virtex-5 FPGA User Manual

Chapter 6: SelectIO Resources

SSTL18 Class II (1.8V)

Figure 6-80
for SSTL Class II (1.8V).
X-Ref Target - Figure 6-80
External Termination
IOB
SSTL18_II
DCI
2R
VRP
SSTL18_II_DCI
Ω
R 0 = 20
2R
VRN
Figure 6-80: SSTL18 (1.8V) Class II Unidirectional Termination
Figure 6-81
for SSTL (1.8V) Class II.
288
shows a sample circuit illustrating a valid unidirectional termination technique
V = 0.9V
TT
R P = Z 0 = 50Ω
R S = 20Ω
IOB
V = 1.8V
CCO
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
shows a sample circuit illustrating a valid bidirectional termination technique
www.xilinx.com
V = 0.9V
TT
IOB
R P = Z 0 = 50Ω
Z 0
V
IOB
V = 1.8V
CCO
2R = 2Z 0 = 100Ω
VRP
Z 0
2R = 2Z 0 = 100Ω
VRN
SSTL18_II
+
–
= 0.9V
REF
SSTL18_II_DCI
+
–
V = 0.9V
REF
ug190_6_75_030506
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009