Hstl Class Iv - Xilinx Virtex-5 FPGA User Manual

Hide thumbs Also See for Virtex-5 FPGA:
Table of Contents

Advertisement

Chapter 6: SelectIO Resources

HSTL Class IV

Figure 6-50
for HSTL Class IV.
X-Ref Target - Figure 6-50
External Termination
HSTL_IV
DCI
HSTL_IV_DCI
260
shows a sample circuit illustrating a valid unidirectional termination technique
V
= 1.5V
TT
IOB
R P = Z 0 = 50Ω
IOB
V
= 1.5V
CCO
R
= Z 0 = 50Ω
VRP
Figure 6-50: HSTL Class IV Unidirectional Termination
www.xilinx.com
V
= 1.5V
TT
IOB
R P = Z 0 = 50Ω
Z 0
V
REF
IOB
V
= 1.5V
CCO
R
= Z 0 = 50Ω
VRP
Z 0
V
HSTL_IV
+
= 0.9V
HSTL_IV_DCI
+
= 0.9V
REF
ug190_6_48_030306
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Virtex-5 FPGA and is the answer not in the manual?

Table of Contents