Hslvdci (High-Speed Low Voltage Digitally Controlled Impedance) - Xilinx Virtex-5 FPGA User Manual

Chapter 6: SelectIO Resources

HSLVDCI (High-Speed Low Voltage Digitally Controlled Impedance)

The HSLVDCI standard is intended for bidirectional use. The driver is identical to LVDCI,
while the input is identical to HSTL and SSTL. By using a V
HSLVDCI allows greater input sensitivity at the receiver than when using a single-ended
LVCMOS-type receiver.
A sample circuit illustrating bidirectional termination techniques for an HSLVDCI
controlled impedance driver is shown in
controlled impedance driver with a V
HSLVDCI_18, HSLVDCI_25, and HSLVDCI_33.
X-Ref Target - Figure 6-35
Figure 6-35: HSLVDCI Controlled Impedance Driver with Bidirectional Termination
For output DC voltage specifications, refer to the LVDCI V
"LVCMOS, LVDCI, and LVDCI_DV2 DC Voltage Specifications at Various Voltage
References." Table 6-10
Valid values of V
noise margin in specific use conditions.
Table 6-10: HSLVDCI Input DC Voltage Specifications
246
HSLVDCI
R 0 = R VRN = R VRP = Z 0
lists the input DC voltage specifications when using HSLVDCI.
are 1.5V, 1.8V, 2.5V, and 3.3V. Select V
CCO
Standard
V
REF
V
IH
V
IL
www.xilinx.com
Figure 6-35. The DCI I/O standards supporting a
referenced input are: HSLVDCI_15,
REF
IOB
Z 0
Min
–
V + 0.1
REF
–
-referenced input,
REF
IOB
HSLVDCI
V = V /2
REF CCO
R 0 = R VRN = R VRP = Z 0
ug190_6_33_022806
and V entries in
OH OL
to provide the optimum
REF
Typ Max
V /2
CCO
–
– V
REF
Virtex-5 FPGA User Guide
UG190 (v5.0) June 19, 2009
+
–
Table 6-9
–
–
– 0.1