IBM PowerPC 604 User Manual page 434

INDEX
Direct-store interface
access to direct-store segments, 3-44
architectural ramifications of accesses, 8-38
bus protocol
address and data tenures, 8-39
detailed
description, 8-42
load access, timing, 8-47
load operations, 8-41
store access, timing, 8-48
store operations, 8-41
transactions, 8-40
XA TS signal, 8-38
direct-store interface accesses, 5-35
instructions with no effect, 5-36
no-op instructions, 5-36
operations, 7-8
protection, 5-35
segment protection, 5-35
selection of direct-store segments, 5-16, 5-35
wisupported functions, 5-36
Dispatch considerations, 6-30
Dispatch serialization mode, 6-34
Dispatch stage, 6-9
OMMU,5-8
OPO-OP7 signals, 7-21
OPE
signal, 7-22
OR1RY signal, 7-23, 8-24, 8-27
OSI exception, 4-16
OSISR register, 2-7
OlLB organization, 5-24
E
EAR (extemal access register), 2-7
Effective address calculation
address translation, 5-4
branches, 2-24
loads and stores, 2-24, 2-35, 2-40
eieio, 2-49, 3-21
Error termination, 8-28
Event counting, 9-8
Exceptions
alignmentexception,4-4,4-17
decrementer exception, 4-4, 4-19
OSI exception, 4-4, 4-16
enabling and disabling, 4-9
exception classes, 4-2
exception prefix bit
(IP),
4-12
exception priorities, 4-5
exception processing, 4-6, 4-10
external interrupt, 4-4, 4-16
FP assist exception, 4-19
FP unavailable exception, 4-4, 4-18
instmction address breakpoint exception, 4-5,
4-20
Index
instmction-related exceptions, 2-25
ISi exception, 4-4
machine check, 4-3
machine check exception, 4-13
perfonnance monitoring intermpt, 4-20
perfonnance monitoring mechanism, 4-5
program exception, 4-4, 4-17
register settings
MSR, 4-7, 4-12
SRRO, SRRl, 4-6
reset, 4-13
returning from an exception handler, 4-11
summary table, 4-3
system call exception, 4-5, 4-19
system management intermpt, 4-5, 4-20
system reset, 4-3
tenninology, 4-2
trace exception, 4-5, 4-19
vector offset table, 4-3
Execute stage, 6-10
Execution seriali7Jltion mode, 6-34
Execution synchronimtion, 2-25
Execution units, 1-10, 6-33
External control instmctions, 2-52, 8-16, A-27
F
Features, 604, 1-2, 1-20
Feed foiwarding, 6-17
Fetch stage, 6-8
Fetch unit, 1-8
Finish cycle, definition, 6-3
Floating-point model
FEO/FEl bits, 4-9
FP arithmetic instructions, 2-30, A-20
FP assist exceptions, 4-19
FP compare instmctions, 2-32, A-21
FP load instmctions, A-24
FP move instructions, A-25
FP multiply-add instmctions, 2-31, A-21
FP rounding and conversion instructions, 2-31,
A-21
FP store instmctions, 2-42, 2-43, A-24
FP unavailable exception, 4-18
FPSCR instructions, 2-32, A-22
IEEE-754
compatibility,
2-16
NI bit in FPSCR, 2-18
Floating-point unit
execution timing, 6-37
overview, 1-11
Flush block operation, 3-20
FPRO-FPR3 l (floating-point registers), 2-4
lndex-3
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