Table Of Contents - IBM PowerPC 604 User Manual

Paragraph
Number
1.1
1.1.1
1.2
1.2.1
1.2.1.1
1.2.1.2
1.2.1.3
1.2.1.4
1.2.1.5
1.2.2
1.2.2.1
1.2.2.2
1.2.2.3
1.2.3
1.2.4
1.2.4.1
1.2.4.2
1.2.5
1.2.5.1
1.2.5.2
1.2.5.3
1.2.6
1.3
Contents
CONTENTS
Tltle
About This Book
Page
Number
Audience ............................................................................................................. xxii
Organization ........................................................................................................ xxii
Suggested Reading ............................................................................................. xxiii
Conventions ....................................................................................................... xxiv
Acronyms and Abbreviations .............................................................................. xxv
Tenninology Conventions •.....•.•••..................•••••••.•..•..............•••••..•.•...•..•.•..•.. xxviii
Chapter 1
Overview
Overview .............................................................................................................. 1-1
PowerPC 604 Microprocessor Features ••••...............•...•.••.•••..•.....•...•••..........•.• 1-2
PowerPC 604 Microprocessor Hardware Implementation ............•......•••.•••.••..•.. 1-7
Instruction Flow ........................................................................ .' ...................... 1-8
Fetch Unit .................................................................................................... 1-8
Decode/Dispatch Unit .................................................................................. 1-9
Branch Processing Unit (BPU) .................................................................... 1-9
Completion Unit .......................................................................................... 1-9
Rename Buffers ......................................................................................... 1-10
Execution Units .............................................................................................. 1-10
Integer Units (IUs) ..................................................................................... 1-10
Floating-Point Unit (FPU) ......................................................................... 1-11
Load/Store Unit (LSU) .............................................................................. 1-11
Memory Management Units (MMUs) .•••••••....•..•.••..................••.••.•............... 1-12
Cache Implementation ..........•..•.••••••.••••••••••••••••••• , ••.......•.....................•......... 1-12
Instruction Cache ....................................................................................... 1-13
Data Cache •••.••.................••••••••.••••••..••..•.•.......................••...•••••••..••••••••••••• 1-13
System Interface/Bus Interface Unit
(BIU) .........•.••..•••••••......•••.•...•..•.••••••.••.
1-14
Memory Accesses ..•..••••••..•............•..........•••..•••••••.•••••••••••••••••••••••••••••••••••• 1-16
Signals ........................................................................................................ 1-16
Signal Coofiguration .................................................................................. 1-17
Clocking ......................................................................................................... 1-18
PowerPC 604 Microprocessor Execution Model. .............................................. 1-19
iii