Signal Coofiguration - IBM PowerPC 604 User Manual

• Address transfer termination signals-These signals are used to acknowledge the
end of the address phase of the transaction. They also indicate whether a condition
exists that requires the address phase to be repeated.
• Data arbitration signals-The 604 uses these signals to arbitrate for data bus
mastership.
• Data transfer signals-These signals, which consist of the data bus, data parity, and
data parity error signals, are used to transfer the data and to ensure the integrity of
the transfer.
• Data transfer termination signals-Data termination signals are required after each
data beat in a data transfer. In a single-beat transaction, the data termination signals
also indicate the end of the tenure, while in burst accesses, the data termination
signals apply to individual beats and indicate the end of the tenure only after the final
data beat. They also indicate whether a condition exists that requires the data phase
to
be repeated.
• System status signals-These signals include the interrupt signal, checkstop signals,
and both soft- and hard-reset signals. These signals are used to interrupt and, under
various conditions,
to
reset the processor.
• Processor state signals-These two signals are used to set the reservation coherency
bit and set the size of the 604's output buffers.
• Miscellaneous signals-These signals are used in conjunction with such resources
as secondary caches and the time base facility.
• Test/COP interface signals-The common on-chip processor (COP) unit is the
master clock control unit and it provides a serial interface to the system for
performing built-in self test (BIST).
• Clock signals-These signals determine the system clock frequency. These signals
can also be used to synchronize multiprocessor systems.
l/
NOTE
A bar over a signal name indicates that the signal is active
low-for example, ARTRY (address retry) and TS (transfer
start). Active-low signals are referred to as asserted (active)
when they are low and negated when they are high. Signals that
are not active-low, such as APO--AP3 (address bus parity
signals) and TTO-TT4 (transfer
type
signals) are referred to as
asserted when they are high and negated when they are low.
1.2.5.3 Signal Configuration
Figure
1-5
illustrates the logical pin configuration of the 604, showing how the signals are
grouped.
Chapter 1. Overview
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