IBM PowerPC 604 User Manual page 29

Table I. Acronyms and Abbreviated Terms (Continued)
Term Meaning
FPR Floating-point register
FPSCR
Floating-point status and control register
FPU Floating-point unit
GPA General-purpose register
HIDO Hardware Implementation dependent (register) O
IABR Instruction address breakpoint register
IBAT Instruction BAT
IEEE Institute of Electrical and Electronics Engineers
ITLB Instruction translation look-aside buffer
IU Integer unit
JTAG Joint Test Action Group
L2 Secondary cache
LR
Unk register
LAU
Least recently used
LSB Least-slgnHlcant byte
lsb
Least-signHlcant
bit
LSU Loadlstore unit
MCIU Multiple-cycle Integer unit
MESI
ModHied/exclusive/sharedlinvalid-cache coherency protocol
MMCRn
Monitor mode control register
n
MMU Memory management unit
MSB
Most-significant byte
msb Most-significant bit
MSR Machine state register
NaN Not a number
No-Op No operation
OEA
Operating environment architecture
PIO Processor identHicatlon tag
PLL Phase-locked loop
PMCn Performance monitor control (register)
n
PMI Performance monitor interrupt
PTE Page table entry
xxvi
PowerPC 604 RISC Microprocessor User's Manual