IBM PowerPC 604 User Manual page 151

Risc
Table of Contents

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Table 3-6. C&che Actions (Continued)
Cache
MESI
Action
Bus
Bus
TT0-4
Rsv'n
Snoop
Action
WIM
State
Operation
WIM
Response
100
ME
Store
Write with
100
00010
(n/a)
(None) or
Store to cache
s
flush
'SAD'
store to main memory
101
I
Store
Write
with
101
00010
(n/a)
(None) or
Write to main memory
flush
'SAD'
(note:
no reload on a store miss)
101
ME
Store
Write with
101
00010
(n/a)
~or
Release the bus
SI
flush
~&'SAD'
retry the operation
101
ME
Store
Write with
101
00010
(n/a)
(None) or
Store to cache
s
flush
'SAD'
store to main memory
000
SI
stwcx.
(None)
(n/a)
(n/a)
None
(n/a)
Update condition register
000
I
stwcx.
RWITM
000
11110
Yes
(None) or
Load the block
of
data Into cache
atomic
(and
'SAD'
release the reservation
reset)
i.pdate the condition register
store to cache
markcache M
000
I
stwcx.
RWITM
000
11110
Yes
~or
Release the bus
atomic
~&'SAD'
retry the oP&ration
000
s
stwcx.
Kill
000
01100
Yes
(None) or
Wait for the kill to be successfully
(and
'SAD'
presented
reset)
release reservation
i.pdate condition register
store to cache
mark cache block M
000
s
stwcx.
Kill
000
01100
Yes
~or
Release the bus
'XRTFN&'SRD'
retry the oP&ration
000
ME
stwcx.
(None)
(n/a)
(n/a)
None
(n/a)
Update condition register
000
E
stwcx.
(None)
(n/a)
(n/a)
Yes
(n/a)
Release reservation
(and
i.pdate condition register
reset)
store to cache
mark cache block M
000
ME
stwcx.
(None)
(n/a)
(n/a)
Yes
(n/a)
(nla)
(and
reset)
000
M
stwcx.
(None)
(nla)
(nla)
Yes
(n/a)
Release reservation
(and
i.pdate condition register
reset)
store
to cache
001
SI
stwcx.
(None)
(n/a)
(n/a)
None
(n/a)
Update condition register
001
I
stwcx.
RWITM
001
11110
Yes
(None) or
Load the block
of
data into cache
atomic
(and
'SAD'
release the reservation
reset)
i.pdate the condition register
store to cache
markcacheM
001
I
stwcx
RWITM
001
11110
Yes
'XRTFNor
Release the
bus
atomic
ARTRY&§m°
retry the oP&ratlon
3-28
PowerPC 604 RISC Microprocessor User's Manual

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