IBM PowerPC 604 User Manual page 129

Instruction Unit
Load/Store Unit
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Instruction MMU DataMMU
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Bus Interface Unit
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Figure 3-3. Bus Interface Unit and MMU
As shown in Figure 3-4, the 604 implements four types of memory queues to support the
four types of operations-line-fill, write, copy-back, and invalidation operations. For a
line-fill operation, the line-fill address from either the instruction or data cache is kept in
the memory address queue until the address can be sent out in an address tenure. After the
address tenure, the address is transferred to the line-fill address queue, which releases the
address bus for other transactions in split-transaction mode. As each double word for the
line-fill operation is returned, it is transferred to the line-fill buffer, where it is forwarded to
theLSU.
3-6
PowerPC 604 RISC Microprocessor User's Manual