Page And Direct-Store Interface Address Translation Selection - IBM PowerPC 604 User Manual

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5.1.6.2 Page and Direct-Store Interface Address Translation
Selection
If address translation is enabled and the effective address information does not match with
a BAT array entry, then the segment descriptor must be located. Once the segment
descriptor is located, the T bit in the segment descriptor selects whether the translation is
to a page or to a direct-store segment as shown in Figure 5-6. In addition, Figure 5-6 also
shows the way in which the no-execute protection is enforced; if the N bit in the segment
descriptor is set and the access is an instruction fetch, the access is faulted as described in
Chapter 7, "Memory Management," in
The Programming Environments Manual.
Note that
the figure shows the flow for these cases as described by the Power PC OEA, and so the TLB
references are shown as optional. As the 604 implements TLBs, these branches are valid,
and described in more detail throughout this chapter.
5-14
PowerPC 604 RISC Microprocessor User's Manual