Data Bus Busy (Dbb); Data Bus Busy (Dbb)-Output; Data Bus Busy - IBM PowerPC 604 User Manual

State Meaning
Asserted-Indicates that the 604 may run the data bus tenure for an
outstanding write address even if a read address is pipelined before
the write address. Refer
to
Section 8.11, "Using Data Bus Write
Only," for detailed instructions for using DBWO.
Negated-Indicates that the 604 must run the data bus tenures in the
same order as the address tenures.
Timing Comments Assertion-Must occur no later than a qualified DBG for an
outstanding write tenure. DBWO is only recognized by the 604 on
the clock of a qualified DBG.
If
no write requests are pending, the
604 will ignore DBWO and assume data bus ownership for the next
pending read request
Negation-May occur any time after a qualified DBG and before the
next assertion of DBG.
7 .2.6.3 Data Bus Busy (DBB)
The data bus busy (DBB) signal is both an input and output signal on the 604.
7 .2.6.3.1 Data Bus Busy (DBB)-Output
Following are the state meaning and timing comments for the DBB output signal.
State Meaning Asserted-Indicates that the 604 is the data bus master. The 604
always assumes
data
bus mastership if
it needs the data bus and is
given a qualified data bus grant (see DBG).
Negated-Indicates that the 604 is not using the data bus.
Timing Comments Assertion-Occurs during the bus clock cycle following a qualified
DBG.
Negation-Occurs a fractional bus clock cycle following the
assertion of the final TA.
High Impedance-Occurs one-half bus cycle (two-thirds bus cycle
when using 3: 1 clock mode, and one-third bus cycle when using 3:2
bus ratio) after DBB is negated.
7.2.6.3.2 Data Bus Busy (DBB)-lnput
Following are the state meaning and timing comments for the DBB input signal. Note that
the DBB input signal cannot be used in systems that use read data streaming.
State Meaning
Assel'.ted-lndicates that another device is bus master.
Negated-Indicates that the data bus is free (with proper
qualification, see DBG) for use by the 604.
Timing Comments Assertion-Must occur when the 604 must be prevented from using
the data bus.
Negation-May occur whenever the data bus is available.
Chapter 7. Signal Descriptions
7-19