IBM PowerPC 604 User Manual page 219

9. If a match is not found within the 8 PTEs of the secondary PTEG, the search fails,
and a page fault exception condition occurs (either an ISi exception or a OSI
exception).
Reads from memory for table search operations should be performed as global (but not
exclusive), cacheable operations, and can be loaded into the on-chip cache.
Figure 5-9 and Figure 5-10 show how the conceptual model for the primary and secondary
page table search operations, described in
The Programming Environments Manual
are
realized in the 604.
Figure 5-9 shows the case of a dcbz instruction that is executed with W = 1 or I = 1, and
that the R bit may be updated in memory (if required) before the operation is performed or
the alignment exception occurs. The R bit may also be updated if memory protection is
violated
5-30
PowerPC 604 RISC Microprocessor User's Manual