IBM PowerPC 604 User Manual page 80

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values of the SIA and SDA may not have any relationship to the type of instruction being
counted.
The event that is to be monitored can be chosen by setting the appropriate bits in the
MMCR0[19-31]. The number of occurrences of these selected events is counted from the
time the
MMCRO
was set either until a new value is introduced into the
MMCRO
register
or until a performance monitor interrupt is generated. Table
2-5
lists the selectable events
with their appropriate
MMCRO
encodings.
Table 2-5. Selectable Events-PMC1
MMCR0[19-25]
Description
Encoding
000 0000 Nothing
000 0001
Processor cycles
000 0010 Number of instructions completed
000 0011 RTCSELECT bit transition
000 0100 Number of instructions dispatched
000 0101 leache misses
000 0110 dtlb misses
000 0111 Branch predicted incorrectly
000 1000
Number of reservations requested (LARX is ready for execution)
000 1001 Number of load deache misses that exceeded the threshold value with lateral L2 intervention
000 1010
Number of store deache misses that exceeded the threshold value with lateral L2 intervention
000 1011
Number of mtspr instructions dispatched
000 1100
Number of sync instructions
000 1101 Number of elelo instructions
000 1110
Number of integer instructions being completed every cycle (no loads or stores)
000 1111 Number of floating-point instructions being completed every cycle (no loads or stores)
001 0000 LSU produced result
001 0001 SCIU1 produced result
001 0010 FPU produced result
001 0011
Instructions dispatched to the LSU
001 0100
Instructions dispatched to the SCIU 1
001 0101 Instructions dispatched to the FP unit
001 0110 Snoop requests received
001 0111 Number of load deaehe misses that exceeded the threshold value without lateral L2 intervention
0011000
Number
of
store deache misses that exceeded the threshold value without lateral L2 intervention
2-14
PowerPC 604 RISC Microprocessor User's Manual