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Deployment CPU 013-CCF0R00
Addressing > Addressing periphery modules
4.4.3 Addressing periphery modules
Max. number of modules
Define addresses by hard-
ware configuration
Automatic addressing
68
The CPU 013-CCF0R00 provides an periphery area (address 0 ... 2047) and a process
image of the in- and outputs (each address default 0 ... 127). The size of the process
image can be adjusted via the parametrization.
parameters' page 78
The process image is updated automatically when a cycle has been completed. The
process image is divided into two parts:
n
Process image of the inputs (PII)
n
Process image of the outputs (PIQ)
1
Periphery area: 0 ... 127 (default)
2
Periphery area : 0 ... 2047
3
Process image of the inputs (PII): 0 ... 127
4
Process image of the inputs (PII): max. 2047
5
Process image of the outputs (PIQ): 0 ... 127
6
Process image of the outputs (PIQ): max. 2047
Up to 64 SLIO modules can be connected to a SLIO CPU. This sum includes power and
clamp modules.
You may access the modules with read respectively write accesses to the peripheral
bytes or the process image. To define addresses a hardware configuration may be used.
For this, click on the properties of the according module and set the wanted address.
If you do not like to use a hardware configuration, an automatic addressing is established.
Here the address assignment follows the following specifications:
n
Starting with slot 1, the central plugged modules are assigned with ascending logical
addresses.
n
The length of the memory area corresponds to the size of the process data of the
according module. Information about the sizes of the process data can be found in
the according manual of the module.
n
The memory areas of the modules are assigned without gaps separately for input and
output area.
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Digital modules are mapped starting at address 0 and all other modules are mapped
starting from address 256. ETS modules are mapped starting from address 256.
n
As soon as the mapping of digital modules exceeds the address 256, by regarding
the order, these are mapped starting from address 256.
VIPA System SLIO
Ä Chap. 4.8 'Setting standard CPU
HB300 | CPU | 013-CCF0R00 | en | 19-30
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