YASKAWA VIPA System SLIO Manual page 59

VIPA System SLIO
Order no.
Number of S7 times
S7 times remanence
S7 times remanence adjustable
Data range and retentive characteristic
Number of flags
Bit memories retentive characteristic adjustable
Bit memories retentive characteristic preset
Number of data blocks
Max. data blocks size
Max. local data size per execution level
Blocks
Number of OBs
Number of FBs
Number of FCs
Maximum nesting depth per priority class
Maximum nesting depth additional within an error OB
Time
Real-time clock buffered
Clock buffered period (min.)
Accuracy (max. deviation per day)
Number of operating hours counter
Clock synchronization
Synchronization via MPI
Synchronization via Ethernet (NTP)
Address areas (I/O)
Input I/O address area
Output I/O address area
Input process image maximal
Output process image maximal
Digital inputs
Digital outputs
Digital inputs central
Digital outputs central
Integrated digital inputs
Integrated digital outputs
Analog inputs
HB300 | CPU | 013-CCF0R00 | en | 19-30
013-CCF0R00
512
adjustable 0 up to 256
not retentive
8192 Byte
adjustable 0 up to 256
MB0 .. MB15
1024
64 KB
4096 Byte
22
1024
1024
16
4
ü
30 d
10 s
8
ü
Master/Slave
no
2048 Byte
2048 Byte
2048 Byte
2048 Byte
16224
16256
528
524
16
12
1015
Hardware description
Technical data
59