Addressing; Overview; Default Address Assignment Of The I/O Part - YASKAWA VIPA System SLIO Manual

VIPA System SLIO

4.4 Addressing

4.4.1 Overview

4.4.2 Default address assignment of the I/O part

Sub module Input
address
AI5/AO2 800
802
Sub module Input
address
DI24/DO16 136
137
Sub module Input
address
Counter 816
820
824
828
Sub module Output
address
DI24/DO16 136
137
Sub module Output
address
Counter 816
820
824
828
HB300 | CPU | 013-CCF0R00 | en | 19-30
To provide specific addressing of the installed peripheral modules, certain addresses
must be allocated in the CPU. This address mapping is in the CPU as hardware configu-
ration. If there is no hardware configuration, depending on the slot, the CPU assigns
automatically peripheral addresses for digital in-/output modules starting with 0 and
analog modules are assigned to even addresses starting with 256.
Access Description
WORD Analog input channel 0 (X4)
WORD Analog input channel 1 (X4)
Access Description
BYTE Digital input I+0.0 ... I+0.7 (X4)
BYTE Digital input I+1.0 ... I+1.7 (X4)
Access Description
DINT Channel 0: Counter value / Frequency value
DINT Channel 1: Counter value / Frequency value
DINT Channel 2: Counter value / Frequency value
DINT Channel 3: Counter value / Frequency value
Access Description
BYTE Digital output Q+0.0 ... Q+0.7 (X5)
BYTE Digital output Q+1.0 ... Q+1.3 (X5)
Access Description
DWORD reserved
DWORD reserved
DWORD reserved
DWORD reserved
Deployment CPU 013-CCF0R00
Addressing > Default address assignment of the I/O part
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