Pull-Ups And Pull-Downs; Layout Notes - Intel PXA27 Series Design Manual

Inter-Integrated Circuit (I2C)
9.3.3

Pull-Ups and Pull-Downs

2
The I C Bus Specification, available from Philips Corporation, states:
"The external pull-up devices connected to the bus lines must be adapted to accommodate the
shorter maximum permissible rise time for the Fast-mode I
the pull-up device for each bus line can be a resistor; for bus loads between 200 pF and 400 pF,
the pull-up device can be a current source (3 mA max.) or a switched resistor circuit."
The design presented in this guide is not intended for loads larger than 200 pF, so the pull-up
device is a resistor as shown in
2
Figure 9-3. C Pull-Ups and Pull-Downs
I
The actual value of the pull-up is system dependent and a guide is presented in the I
Specification on determining the maximum and minimum resistors to use when the system is
intended for standard or fast-mode I
9.4

Layout Notes

The maximum switching frequency of the PWM signals is 400 KHz. Therefore, layout and routing
considerations are not stringent and somewhat relaxed. However, for best results, adhere to
common layout recommendations.
Separate the physical routing of the data and clock signals and ensure that lines are not routed near
other potential noise sources, such as switching regulators or signals with high switching
frequencies.
II:9-4
Figure 9-3.
SCL
SDA
2
C bus devices.
2
C-bus. For bus loads up to 200 pF,
4.99KΩ
4.99KΩ
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Intel PXA27x Processor Family Design Guide
VCC
2
C Bus