Intel PXA27 Series Design Manual page 244

PXA27x DVK Block Diagram
Figure A-1. System Overview Block Diagram
UART
BTUART
Header
USB Client
/ ICAT
IRDA
Mainstone II Baseboard
Note:
Camera is mux'd on
top of SSP1, PWM1 &
USIM
A-2
ADI or RFMD
Radio I/F
RF Board
Logic General
Analyzer Purpose SSP Header
Headers Switches
General
Expansion
Purpose
Connector
LEDs
Baseband
Connector
HGO Marathon Graphics
Accelerator
LCD
LCD Module
PXA27x
MSL
Processor
Mainstone II Daughter Card
AD6521
High Speed Logger Connector
Aux A2D/D2A
Baseband I/Q
Voiceband
Bottom Connector
CODEC
16-bit 16-bit
USIM LA
Flash SRAM
32-bit 32-bit
32-bit
LA
Flash SRAM SDRAM
USB Host
USB Client
FPGA
Camera Header
(mux'd with USIM
& SSP1)
Ethernet
32-bit
Asynch
Flash
Camera
Camera /
Key Board
®
Intel PXA27x Processor Family Design Guide
Garson
Communications
Processor
PMIC Header
UART EMT
UART JTAG
USIM / UICC
USB On The Go
(mux'd with
FFUART)
PCMCIA
(mux'd with MSL)
SSP
Touchscreen
Audio CODEC /
Touchscreen
Connector
SD/MMC or
Memory Stick
Spkr
Scroll
Wheel
1 2 3
4 5 6
7 8 9
* 0 #
. @ ?
c ← ↵
a
p
s
Mic