Intel PXA27 Series Design Manual page 7

10 UART Interfaces....................................................................................................................II: 10-1
10.1 Overview ......................................................................................................................II: 10-1
10.2 Signals .........................................................................................................................II: 10-2
10.3 Types of UARTs ..........................................................................................................II: 10-3
10.3.1 Full Function UART ........................................................................................II: 10-3
10.3.1.1 Full Function UART Signals............................................................II: 10-3
10.3.1.2 FFUART Block Diagram .................................................................II: 10-4
10.3.1.3 FFUART Layout Notes....................................................................II: 10-4
10.3.2 Bluetooth UART ..............................................................................................II: 10-5
10.3.2.1 Bluetooth UART Signals .................................................................II: 10-5
10.3.2.2 Bluetooth UART Block Diagram......................................................II: 10-5
10.3.3 Standard UART ..............................................................................................II: 10-6
10.3.3.1 Standard UART Signals..................................................................II: 10-6
10.3.3.2 Standard UART Block Diagram ......................................................II: 10-6
11 Fast Infrared Interface..........................................................................................................II: 11-1
11.1 Overview ......................................................................................................................II: 11-1
11.2 Signals .........................................................................................................................II: 11-1
11.3 Block Diagram .............................................................................................................II: 11-2
12 'USB Client Controller..........................................................................................................II: 12-1
12.1 Overview ......................................................................................................................II: 12-1
12.2 Signals .........................................................................................................................II: 12-1
12.3 Block Diagram .............................................................................................................II: 12-2
12.4 Layout Notes................................................................................................................II: 12-2
12.4.1 Self-Powered Devices ....................................................................................II: 12-2
12.4.1.1 Operation if GPIOn and GPIOx are Different Pins..........................II: 12-3
12.4.1.2 Operation if GPIOn and GPIOx are the Same Pin..........................II: 12-4
12.4.2 Bus-Powered Device ......................................................................................II: 12-5
12.4.3 USB On-The-GO Transceiver Usage .............................................................II: 12-6
12.4.4 Interface to External Transceiver (OTG).........................................................II: 12-8
12.4.5 Interface to External Charge Pump Device (OTG) .........................................II: 12-9
12.4.6 OTG ID .........................................................................................................II: 12-11
12.4.7 Interface to External USB Transceiver (non-OTG) .......................................II: 12-12
13 AC '97 ....................................................................................................................................II: 13-1
13.1 Overview ......................................................................................................................II: 13-1
13.2 Signals .........................................................................................................................II: 13-1
13.3 Block Diagram .............................................................................................................II: 13-2
13.4 Layout Notes................................................................................................................II: 13-3
14 I2S Interface ..........................................................................................................................II: 14-1
14.1 Overview ......................................................................................................................II: 14-1
14.2 Signals .........................................................................................................................II: 14-2
14.3 Block Diagram .............................................................................................................II: 14-3
14.4 Layout Notes................................................................................................................II: 14-3
14.5 Modes of Operation Overview .....................................................................................II: 14-4
14.5.1 PXA27x Processor Provides BITCLK signal to CODEC.................................II: 14-4
14.5.1.1 Signals ............................................................................................II: 14-4
14.5.1.2 Block Diagram.................................................................................II: 14-5
14.5.2 CODEC Provides BITCLK Signal to PXA27x Processor ................................II: 14-6
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Intel PXA27x Processor Family Design Guide
Contents
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