Intel PXA27 Series Design Manual page 16

Contents
10-3 BTUART Interface Signals ..................................................................................................II: 10-5
10-4 STUART Interface Signals ..................................................................................................II: 10-6
11-1 FICP Signal Description ......................................................................................................II: 11-1
12-1 USB Client Controller Interface Signals Summary ..............................................................II: 12-1
12-2 Host Port 2 OTG Transceiver Switch Control Settings........................................................II: 12-7
12-3 Output to External USB Transceiver .................................................................................II: 12-13
12-4 Input from External USB Transceiver ................................................................................II: 12-13
13-1 External Interface to CODECs.............................................................................................II: 13-1
14-1 I2S Controller Interface to CODEC......................................................................................II: 14-2
14-2 I2S Controller Interface to CODEC (PXA27x Processor Providing BITCLK to CODEC) ....II: 14-4
14-3 I2S Controller Interface to CODEC (CODEC Providing BITCLK
to the PXA27x Processor)...........................................................................................................II: 14-6
15-1 Multimedia Card/SD/SDIO Card Controller Interface Signal Summary ...............................II: 15-2
15-2 MMC/SD/SDIO Controller Supported Sockets and Devices ...............................................II: 15-2
15-3 MMC/SD/SDIO Controller Supported Device Configurations..............................................II: 15-3
15-4 Multimedia Card Protocol Interface Signals ........................................................................II: 15-4
15-5 MMC Pull-up and Pull-down Resistors ................................................................................II: 15-6
15-6 SD Card and SDIO Card Protocol Interface Signals ...........................................................II: 15-7
15-7 SD/SDIO Card Pull-Up and Pull-Down Resistors..............................................................II: 15-10
15-8 SPI Protocol Interface Signals...........................................................................................II: 15-11
17-1 Memory Stick Host Interface Signal List..............................................................................II: 17-1
18-1 Interface Signals Summary .................................................................................................II: 18-2
19-1 PXA27x Processor Interface Signals Summary ..................................................................II: 19-2
19-2 USIM Card Signals ..............................................................................................................II: 19-3
20-1 USB Host Controller Interface Signals Summary ................................................................II: 20-1
21-1 RTC Interface Signal List.....................................................................................................II: 21-1
22-1 OS Timer Interface Signals .................................................................................................II: 22-1
23-1 PWM Interface Signal List ...................................................................................................II: 23-1
24-1 GPIO Interface Signal List ...................................................................................................II: 24-1
25-1 GPIO Unit I/O Signal ...........................................................................................................II: 25-2
26-1 TAP Controller Pin Definitions .............................................................................................II: 26-3
26-2 IEEE 1149.1 Boundary-Scan Instruction Set.......................................................................II: 26-6
26-3 IEEE 1149.1 Boundary-Scan Instruction Descriptions ........................................................II: 26-6
26-4 I/O Pins Excluded from Boundary-Scan Register................................................................II: 26-8
26-5 JTAG Device Identification (ID) Register...........................................................................II: 26-15
26-6 Test Register Summary.....................................................................................................II: 26-16
27-1 Signal Descriptions for Quick Capture Technology .............................................................II: 27-2
Appendix
B-1 Processor Developer's Kit (formerly NBMMNS3BVS DVK) ................................................. II: B-1
B-2 Processor Developer's Kit (formerly NBMMNS2BVS DVK) ................................................. II: B-1
B-3 Processor Developer's Kit .................................................................................................... II: B-2
D-1 PXA27x Processor Operating Modes not Supported by the PXA25x Processor ................. II: D-2
E-1 Crystal Devices..................................................................................................................... II: E-1
E-2 Manufacturers of PMIC Devices........................................................................................... II: E-2
E-3 USB OTG Transceivers........................................................................................................ II: E-4
xvi
®
Intel PXA27x Processor Family Design Guide