Intel PXA27 Series Design Manual page 294

Index
DR State II:26-12
IR State II:26-14
External 13.00-MHz Clock II:3-8
External 32.768-KHz Clock II:3-7
External Clock Enable Configuration Scheme
II:8-5
External Clock Source Configuration Scheme
II:8-4
F
Fast Infrared Communication Port
II:D-8, II:E-3
Fast Infrared Interface II:11-1
Feature List II:27-2
Features, JTAG II:26-2
FFUART
Block Diagram II:10-4
Layout Notes II:10-4
Flash
Block Diagram II:6-16
Data Register II:26-9
Layout Note II:6-16
Memory Interface II:6-15
Memory Signals II:6-15
Flow-Through DMA Transfers II:5-5
Fly-By DMA Transfers II:5-3
FS-CSP Escape Routing I:2-8
Full Function UART II:10-3
Full Function UART Signals II:10-3
Functional Overview, PXA27x I:1-2
G
General PCB Characteristics I:2-1
General Purpose Input/Output Interfaces II:24-1
General-Purpose I/O Unit
II:D-14, II:E-5
H
Handling
Shipping Media I:2-10
HD-CSP Escape Routing I:2-7
Host Controller, Universal Serial Bus II:D-10
I
I2C Bus Interface Unit
II:D-7, II:E-3
I2S (Inter IC Sound Controller)
II:D-9, II:E-5
I2S Interface II:14-1
ID Interfacev, Universal Subscriber II:E-5
IX-2
Instructions
TRISTATE II:26-6
Intel XScale® Data Registers II:26-9
Intel(R) Mobile Scalable Link
II:E-5
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Intel Flash Memory Design Guidelines I:2-1
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Intel Quick Capture Technology II:27-1
Interface to
External Charge Pump Device (OTG) II:12-9
External Transceiver (OTG) II:12-8
External USB Transceiver (non-OTG) II:12-12
Interface, Universal Subscriber ID II:E-5
Interfacing to
Matrix Keypad II:18-5
Inter-Integrated Circuit II:9-1
Internal Clock Enable Configuration Design II:8-5
Internal Memory
II:D-2, II:E-2
Internal SRAM II:4-1
Interrupt Controller
II:D-14, II:E-5
Interrupt Interface II:25-1
Introduction
II:D-1, II:E-1
Introduction to Part I I:1-1
Introduction to Part II II:1-1
J
JTAG Debug II:26-1
JTAG Device Identification Register II:26-15
JTAG Instruction Register and Instruction Set II:26-5
JTAG Interface
II:E-5
JTAG Test Data Registers II:26-16
K
Keypad Interface
II:18-1, II:D-10, II:E-5
Keypad Matrix and Direct Keys
No Rotary Encoder II:18-6
One Rotary Encoder II:18-8
Two Rotary Encoders II:18-10
Keypad Signals to Wake-up from Standby and Sleep Mode
II:18-4
L
Layout Notes
II:3-6, II:4-2, II:5-2, II:5-4, II:5-6, II:7-3, II:7-7, II:7-9,
II:7-11, II:7-13, II:7-15, II:7-17, II:7-19, II:7-
21, II:7-23, II:8-6, II:9-4, II:12-2, II:13-3,
II:14-3, II:15-2, II:17-2, II:18-4, II:19-5, II:20-
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Intel PXA27x Processor Family Design Guide