Achieve Minimum Power Usage During Sleep; Achieve Minimum Power Usage During Standby; Achieve Minimum Power Usage During Idle/13M/Run/Turbo - Intel PXA27 Series Design Manual

5.5

Achieve Minimum Power Usage During Sleep

Methods used for achieving lowest power usage during sleep power modes:
•
Ground SRAM/PLL/Core power domains to enable the designer find the lowest power
consumption and validate the design.
•
Configure GPIO signals of the PXA27x processor as input and drive a low from external
source. Programmers can use PGSR/FS (GPIOs in O/P mode).
•
Ensure TDI and TMS pins are pulled high or left floating.
•
Ensure the USBC differential inputs (USBCP and USBCN) are pulled high or left floating
with no impact to OTG pins.
•
Enable DC-DC internal power supply.
5.6

Achieve Minimum Power Usage During Standby

Methods used to achieve lowest power usage during standby power modes:
•
Ensure VCC_CORE and VCC_SRAM voltage is at 1.1 V.
•
Configure GPIO signals of the PXA27x processor as input and drive a low from external
source. Programmers can use PGSR/FS (GPIOs in O/P mode).
•
Ensure TDI and TMS pins are pulled high or left floating.
•
Ensure the USBC differential inputs (USBCP and USBCN) are driven high or left floating
with no impact to OTG pins.
5.7 Achieve Minimum Power Usage During Idle/13M/
Run/Turbo
Methods used to achieve lowest power usage during idle, 13M, run and turbo power modes:
•
Run/Turbo
— Set auto power down (APD) bit.
— Enable both instruction and data caches.
— Use read allocate/write back (caching policy).
•
13M
— Disable PLLs.
•
Idle
— Ensure interrupts are disabled to prevent unexpected walk-ups.
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Intel PXA27x Processor Family Design Guide
Power Measurements
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