Intel PXA27 Series Design Manual page 216

General Purpose Input/Output Interfaces
There are no pull-up or pull-down resistors connected to any of the GPIOs when PSSR[RDH] is
cleared, which is the state required for normal operation. These pull-ups and pull-downs only
operate in sleep/deep sleep mode. Any pull-ups or pull-downs required for normal operation must
be externally provided. The possibility of conflicting pull-ups and pull-downs must be considered
when using external pull-up or pull-down resistors in sleep/deep sleep mode. Failure to properly
account for this results in incorrect operation or excess power usage.
Note: nRESET_GPIO (GPIO<1>) has an internal pull-up that is active following any reset the exception
is when exit from sleep or deep sleep and until PSSR[RDH] is cleared.
A portion of the GPIO pins have alternate functions with bidirectional signals. For these signals,
the direction of the pin is controlled by the peripheral directly overriding the GPIO direction
settings for these pins. These pins are:
•
MMCMD,
•
MMDAT<3:0>
•
MSSDIO
•
SSPSCLK1
•
SSPSCLK2
•
SSPSCLK3
•
SSPSFRM
•
SSPSFRM2
•
SSPSFRM3
•
L_DD<17:0>
2
•
I C pins:
— PWR_SDA
— PWR_SCL
— SDA
— SCL
For all other signals, the GPIO Direction Register must be correctly configured for the GPIO
function.
Special care must be taken with any GPIO that is used for generating resets. The power manager
directly overrides the function of GPIO<10:2> and configures these signals as GPIOs for use as
GPIO reset signals. If the particular system implementation uses this function, the GPIOs must be
designed such that this does not cause conflicts on the GPIOs. Refer to Section 3 of the Intel
PXA27x Processor Developers Manual for information regarding this function.
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Intel PXA27x Processor Family Design Guide
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